A 28GHz time-division multiple-input multiple-output (MIMO) receiver with eight radio frequency elements, each occupying just 0.1 mm2, has been developed by researchers at Tokyo Tech using 65nm CMOS technology. This innovative design reduces chip size for beamforming. Achieving -23.5 dB error vector magnitude in 64-quadrature amplitude modulation and data rates up to 9.6 Gbps, this receiver offers the highest area efficiency and fastest beam switching among reported MIMO receivers.
Compact and scalable multiple-input multiple-output systems for future 5G networks
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